DEEPX AI Chip Line-up
Powering the Future of Edge AI

DX-M Series
DX-M1

DX-M Series
DX-M1M
(Coming Soon)

DX-V3
(Coming Soon)

DX-M Series
DX-M2
(Coming Soon)

DX-M1
Key Features
Delivering breakthrough performance while consuming significantly less power than competitors, enabling longer battery life for mobile devices and reduced energy costs for data centers. (Butter-Proof)
Purpose-built dedicated DRAM enables simultaneous multi-model processing, allowing your applications to run multiple AI models concurrently without performance degradation.
Engineered for seamless integration with any host CPU architecture—zero compatibility issues means faster deployment, simplified development, and protection for your existing infrastructure investments
Our innovative design minimizes expensive on-chip SRAM requirements, delivering substantial cost advantages without compromising performance—making advanced AI accessible at scale
AI Performance
AI Model | Input Resolution | Accuracy (mAP)
FP32 GPU | Accuracy (mAP) *IQ8 DX-M1 | FPS DX-M1 | NPU Power (W) DX-M1 | FPS/W DX-M1 |
---|---|---|---|---|---|---|
YOLOv5m6 | 640×640 | 45.08 | 45.07 | 40.42 | 2.20 | 18.37 |
YOLOv7-e6 | 640×640 | 55.58 | 55.45 | 19.49 | 2.50 | 7.81 |
YOLOv8x | 640×640 | 53.63 | 53.12 | 49.03 | 3.17 | 15.48 |
YOLOv8l | 640×640 | 52.57 | 52.01 | 91.13 | 3.60 | 25.32 |
YOLOv8m | 640×640 | 50.11 | 49.56 | 133.60 | 2.76 | 48.32 |
YOLOv9c | 640×640 | 52.86 | 52.36 | 47.89 | 2.83 | 16.95 |
- *This is the test result of Pro compilation among Pro and Master of DEEPX compiler.
- *IQ8: High-accuracy AI processing using efficient INT8 operations.
Successful Use Cases


Storage Server

Robotics Platform

Computing System

DX-M1M
TBU
TBU

DX-V3
